COSC 170 Compiler Construction

Spring 2009

Project #6; Instruction Selection

Implement an Instruction Selector for our dialect of the MiniJava programming language, as detailed below.
Project 6 may be completed in teams of three.
Due: Friday, May 1, 11:59PM CST.
Submit entire Project6 directory via turnin command on Morbius.

Directions

  • Read Chapters 8 and 9 of Appel.
  • Implement a translator that converts our Project 5 Intermediate Representation (IR) trees into MIPS assembly language with an infinite pool of temporaries.
  • Run the reference implementation of the instruction selector on Morbius with the command: ~brylow/cosc170/Projects/assem program.java
  • Create your instruction selector in a package called "Assem" with a main program in class "Main". My grading protocol will assume that your project can be compiled and run with the following command line: cd Project6; make; java Assem.Main inputfile.java.
  • Build a decent set of MiniJava testcases. Several exist in the book, and on the web. Having a good set of test inputs will be critical to your success in later phases of the project. The majority of project points will be assigned by running diff to compare your output against mine.
  • Debug until done.
  • Specification

  • To adapt your intermediate representation trees to the next phase, you will need to add kids() and build() methods to work with the Canonicalization code. (Refer to Appel chapters 8 and 9 for more information.)
  • Add a CodeVisitor class to your Tree< package that returns a Temp.Temp for the visit methods of each IR tree node that has an interlocking pattern; the others may return void. The Mips.Codegen visitor should extend this interface, and will produce the instruction tilings.
  • I have included complete tarballs for the Assem package and the Canon package in the project directory.
  • Hints

    My instruction selector uses these MIPS Patterns to drive instruction selection.

    Note that the reference implementation for this project includes various command-line options for producing more output at various substages.

    I have also provided a register allocator and a Xinu-based MIPS Playground for you to run your final output on a target backend.


    Back
    [Rev 1.1 2009 Apr 20 02:55 DWB]