COSC 065 Hardware Systems

Course Syllabus: Lectures
Office Hours
Grading Policy
Course Instructor: Dennis Brylow
Email: brylow at mscs dot mu dot edu
Office: Cudahy 380
MW 2:00PM - 2:50PM, CU 137
F 2:00PM - 3:50PM, CU 137 / CU 310
Office Hours
Mon/Wed 3:00PM - 4:00PM
Mon 7:00PM - 8:00PM
Fri 11:00AM - 12:00PM
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ECA Textbook Cover
Essentials of Computer Architecture.
Douglas Comer.
Readings will be regularly assigned from the textbook.
Lectures will assume that students have already read the assigned chapters.
In addition, some of the written homework problems may be assigned out of the book.
Some of these problems also make excellent exam questions.

Course Objectives

Upon completing this course, students will be able to:
  • Understand the principles underlying computer hardware systems, and appreciate how these principles shape software;
  • Define and describe the purpose of major components in modern computer hardware, and understand how these components work together to accomplish computing;
  • Read and write assembly languages for two common computer processors, and employ these assembly languages to solve programming problems.
  • Course Policies

    Grades will be calculated using the following formula:
    Homework 60%
    Pop (Reading) Quizzes 5%
    Exam #1 10%
    Exam #2 10%
    Exam #3 15%
  • Students must pass BOTH the exam portion of the grade AND and homework assignment portion of the grade to pass the course overall.
  • Assignments are to be completed individually, except when specifically noted otherwise. You may discuss course topics with your collegues, but written work and programmed code is not to be shared.
  • Academic dishonesty (claiming another person's work as your own) will not be tolerated. Infractions will result in immediate failure of the course, and referral to the Dean's office.
  • If you are not certain what constitutes fair play and what will be considered academic dishonesty, please ask the instructor.
  • Schedule

    Week Topics Readings Notes/Demos Assignments
    01 Introduction, Digital Logic Ch 1
    02 Digital Logic Ch 2 #1 Digital Logic
    03 Combinational and Sequential Logic #2 Sequential Logic
    04 Data Representation Ch 3 #3 Representation
    05 Processors, Pipelines Ch 4 #4 Hex Dump
    06 Instruction Sets, RISC Exam #1
    07 Assembly Languages Ch 5 #5 Basic MIPS Assembly
    08 Addressing Modes Ch 6 #6 Medium MIPS Assembly
    09 Activation Records Ch 7, 8 #7 Activation Records
    10 CISC Ch 9, 10 #8 Time and Space
    11 Memory and Storage Ch 11 Exam #2
    12 Virtual Memory Ch 12 #9 Serial Communications
    13 Caches Ch 13
    14 I/O Ch 14, 15 #10 Basic Intel
    15 Buses, Interrupts Ch 16 #11 Medium Intel
    Final Exam #3
    The instructor reserves the right to adjust this schedule as necessary.

    [Revised 2008 Aug 08 08:26 DWB]